EDN

Synthesis tool links MATLAB with ASIC, FPGA designs

MILPITAS, Calif. — AccelChip has crafted a DSP synthesis tool that converts algorithms developed in MATLAB into synthesizable RTL that can be used during the design of FPGAs, ASICs and structured ...
Business Wire

MathWorks Speeds FPGA and ASIC Verification with Universal Verification Methodology (UVM) Support

NATICK, Mass.--(BUSINESS WIRE)--MathWorks today announced that HDL Verifier provides support for the Universal Verification Methodology (UVM) starting with Release 2019b, which is currently available.
Houston Chronicle

(BW) National Instruments Announces the 20th Anniversary Edition of LabVIEW; LabVIEW 8.20 Delivers General Compatibility with The MathWorks, Inc. MATLAB(R) Software, FPGA-Based ...

AUSTIN, Texas--(BUSINESS WIRE)--Aug. 8, 2006--National Instruments (Nasdaq:NATI), a global leader in virtual instrumentation, today announced NI LabVIEW 8.20 (www.ni ...
Hackaday

65F02 Is An FPGA 6502 With A Need For Speed

Does the in 65F02 “F” stand for “fast” or “FPGA”? [Jurgen] doesn’t know, but his drop-in replacement board for the 6502 and 65c02 is out there and open source, whatever you want it to stand for. The ...