Design-Reuse

Codasip Releases a Major Upgrade of Its Studio Processor Design Toolset with a Tutorial RISC-V core

Munich, Germany – April 13 th, 2021 – Codasip, the leading supplier of processor design solutions and customizable RISC-V processor IP, is pleased to announce the availability of Codasip Studio 9.0 ...
Design-Reuse

Risc-v architecture tutorial IP Listing

The Synopsys ARC-V™ RMX-100 series processors are optimized for use in embedded applications where power and area are the utmost concern. The DSP enhanced implementation (RMX-100D) adds DSP ... The ...
New Electronics

Semidynamics launches first fully-coherent RISC-V Tensor unit

Semidynamics has announced a RISC-V Tensor Unit that is designed for ultra-fast AI solutions and is based on its fully customisable 64-bit cores. State-of-the-art Machine Learning models, such as ...
Android Authority

RISC-V support in Android just got a big setback

The Android Common Kernel is about to remove support for the RISC-V architecture. Android Common Kernel is Google’s fork of the upstream Linux kernel but with Android-specific additions. RISC-V is an ...
Finanznachrichten

OneSpin Addresses the Challenges of RISC-V Verification Through Series of Speaking Engagements, Workshop, and Tutorials

Series designed to help developers and integrators effectively verify RISC-V integrity: functional correctness, safety, security, and trust OneSpin Solutions, provider of certified IC integrity ...